PCIe Add-In Cards, Retimers and Redrivers

An add-in card is the host end of an interconnect. It takes a PCIe slot and presents the connector your topology actually needs — MCIO, SlimSAS, OCuLink, U.2 — and, where the link budget requires it, conditions the signal on the way through.

The card is where a cable run stops being a cable question and becomes a signal integrity question.

What does a PCIe add-in card actually do?

A PCIe add-in card converts a slot into cabled lanes. The slot provides the electrical interface and the mechanical anchor; the card carries the lanes to one or more cabled connectors, in the lane width and topology the build requires.

That makes three things specifiable independently: the slot width the card occupies, the connector or connectors it presents, and how the available lanes are divided between them. A x16 card can present one x16 path, two x8 paths, or four x4 paths, and which of those a host supports is a platform question rather than a card question.

What is the difference between a retimer and a redriver?

Both are signal conditioners, and they are not interchangeable.

A redriver is analog. It equalizes and amplifies the waveform passing through it. It does not interpret the protocol, it does not recover the clock, and it does not reset the link budget — it improves a signal that is already degrading.

A retimer is protocol-aware. It recovers the clock, re-establishes the bit stream, and retransmits it as a fresh signal. Because the link is re-established rather than merely boosted, the budget downstream of a retimer starts again.

The practical difference is reach. Where a run is long enough that a redriver no longer holds the link, a retimer is the component that does — at the cost of added latency, added power and a part that must match the generation it is carrying.

When does a build actually need signal conditioning?

Conditioning is a function of the whole channel, not of the cable alone: slot, card, connectors, cable length, conductor gauge and the number of mated interfaces between the two endpoints all consume budget.

Each PCIe generation doubles the rate and tightens that budget. A passive run that was comfortable at one generation is frequently marginal at the next, with no change to the physical layout at all — which is why a working assembly can stop working after a platform upgrade.

Where a channel sits against its budget is a calculation, not a guess. Tell us the endpoints, the generation and the routed length, and it is something engineering review can answer before anything is built.

What decides whether a card will physically fit?

• Slot width and the lanes actually wired to it. A x16 slot is not always a x16 electrical path.
• Bracket height. Full height or low profile, and which the chassis accepts.
• Card length, against the clearance in front of the slot.
• Connector orientation on the card, which decides where the cable can leave and whether it fouls anything.
• Airflow direction, where a conditioned card adds a thermal load the chassis has to carry.

What add-in cards does EPS build to specification?

PCIe add-in cards presenting MCIO, SlimSAS, OCuLink and U.2 connectors, in passive form or with signal conditioning, together with the cable assemblies that complete the path. Bracket, card outline, lane division and connector orientation are all build inputs.

EPS is a manufacturer rather than a shelf. A card is defined by your topology and confirmed in engineering review before quote — including whether the channel as described needs conditioning at all.

What information does EPS need to quote an add-in card?

1. The slot the card goes into, and the lanes electrically wired to it
2. The connector or connectors the card must present, and the lane division across them
3. The PCIe generation the link has to carry
4. The routed cable length from card to endpoint, measured along the intended path
5. Bracket height, chassis clearance and airflow direction
6. Quantity, and whether this is a prototype or a production run

Frequently asked questions